Title :
A novel digital symbol timing recovery implementation for high speed variable rate QPSK RF modems
Author_Institution :
SPAR Aerosp. Ltd., Sainte Anne de Bellevue, Que., Canada
Abstract :
An approach to symbol timing recovery is presented which uses a hybrid digital phase-locked loop. The implementation is presented along with a simple model for predicting loop behavior. The modulation removal, phase detector and loop filter are all digital whereas the VCXO uses analog components. The baseband eye diagram drives a digital phase detector to provide the timing phase error. This signal is independent of carrier phase information, thus permitting parallel symbol timing and carrier-phase-recovery operations
Keywords :
digital integrated circuits; modems; phase shift keying; phase-locked loops; VCXO; analog components; baseband eye diagram; digital phase detector; digital symbol timing recovery; high speed variable rate QPSK RF modems; hybrid digital phase-locked loop; loop filter; modulation removal; timing phase error; Baseband; Detectors; Digital filters; Digital modulation; Phase detection; Phase locked loops; Phase modulation; Predictive models; Signal analysis; Timing;
Conference_Titel :
Communications, 1988. ICC '88. Digital Technology - Spanning the Universe. Conference Record., IEEE International Conference on
Conference_Location :
Philadelphia, PA
DOI :
10.1109/ICC.1988.13710