DocumentCode
2161688
Title
Reliable and enhanced performances of sub-0.1 /spl mu/m pMOSFETs doped by low biased plasma doping
Author
Lenoble, D. ; Arnaud, F. ; Grouillet, A. ; Liebert, R. ; Walther, S. ; Felch, S.B. ; Fangi, Z. ; Haond, M.
Author_Institution
CNET, Grenoble, France
fYear
2000
fDate
13-15 June 2000
Firstpage
110
Lastpage
111
Abstract
For the first time, we include low biased plasma doping (LB PLAD) technique for extensions doping within an industrial 0.13 /spl mu/m CMOS process. By comparing to the Ultra-Low Energy Ion Implantation (B/sup +/ and BF/sub 2//sup +/) technique (ULE I/I), plasma doped devices exhibits improved Short Channel Effect (SCE) and subthreshold performances mostly attributed to the good junction characteristics (tradeoff junction depth (X/sub j/)/sheet resistance (R/sub s/)).
Keywords
MOSFET; ion implantation; plasma materials processing; semiconductor doping; 0.13 micron; deep submicron CMOS process; low biased plasma doping; pMOSFET; reliability; sheet resistance; short channel effect; subthreshold characteristics; ultra-low-energy ion implantation; ultra-shallow junction; Annealing; Current measurement; Degradation; Design for quality; Doping; Fabrication; Implants; MOSFETs; Plasma applications; Plasma measurements;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2000. Digest of Technical Papers. 2000 Symposium on
Conference_Location
Honolulu, HI, USA
Print_ISBN
0-7803-6305-1
Type
conf
DOI
10.1109/VLSIT.2000.852789
Filename
852789
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