DocumentCode :
2161705
Title :
Ultra low energy arsenic implant limits on sheet resistance and junction depth
Author :
Kasnavi, R. ; Griffin, P.B. ; Plummer, J.D.
Author_Institution :
Center for Integrated Syst., Stanford Univ., CA, USA
fYear :
2000
fDate :
13-15 June 2000
Firstpage :
112
Lastpage :
113
Abstract :
We have investigated the limits on sheet resistance, junction depth and abruptness using ultra low energy As implants and RTA annealing. We report on anomalous diffusion of 1 keV arsenic implants where the same RTA anneal can result in a deeper junction compared to a 5 keV implant of similar dose. A range of anneal times and temperatures in an RTA from 1020C to 1175C, including spike anneals, have been studied. The effect of junction abruptness in reducing the external resistance of the S/D extension for these 5 and 1 keV As implants has been investigated. We show that because of a trade off between junction depth and sheet resistance limits, 1 keV As implants and RTA anneals cannot meet the technology roadmap requirements beyond 2005, though the junction abruptness will meet the requirements till 2011.
Keywords :
arsenic; diffusion; elemental semiconductors; ion implantation; rapid thermal annealing; semiconductor junctions; silicon; 1 keV; 1020 to 1175 C; 5 keV; RTA; Si:As; dopant diffusion; junction abruptness; junction depth; sheet resistance; source/drain extension; spike annealing; ultra-low-energy arsenic ion implantation; Etching; Implants; Nitrogen; Plasma applications; Plasma temperature; Rapid thermal annealing; Semiconductor films; Silicon; Temperature distribution; Thermal degradation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Technology, 2000. Digest of Technical Papers. 2000 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-6305-1
Type :
conf
DOI :
10.1109/VLSIT.2000.852790
Filename :
852790
Link To Document :
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