The PowerPC 604 microprocessor design methodology

The PowerPC 604 microprocessor design methodology represents an interesting evolution from the one used to produce the PowerPC 601 μP. While the PowerPC 601 μP was intended to provide a marketable PowerPC product as quickly as possible, the PowerPC 604 μP had a higher performance implementation goal. We feel that our design techniques were appropriate for this new balance of schedule and performance. New challenges included more reliance on custom circuits and a larger amount of design data than we had previously dealt with. This required expanding our design process to include tools from Cadence, Motorola, and IBM. The PowerPC 604 μP used synthesis to transform the model to a gate-level implementation and billions of cycles were simulated to ensure compliance with the PowerPC instruction set. The use of this design methodology has led to successful first pass silicon