Optimal logic blocks for FPGAs, using factorial design techniques

This paper discusses a powerful experimental technique that makes it possible to examine the effect of logic block attributes on the block area density. The logic block is XOR-AND based, and five unique attributes were investigated. The experiment consisted of several iterations in which benchmark circuits were mapped on to various blocks, each varying in some attribute. Results are plotted on to a response contour map, indicating a point of maximum area density. The results have shown that inverting primary inputs to AND gates of the function structure is insignificant. In addition results indicate that two level function structures with an XOR output gate are able to contain logic in the smallest physical area