• DocumentCode
    2162627
  • Title

    A multi-schedule approach to high-level synthesis

  • Author

    Dalkiliç, Mehmet Emin ; Pitchumani, Vijay

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Syracuse Univ., NY, USA
  • fYear
    1994
  • fDate
    10-12 Oct 1994
  • Firstpage
    572
  • Lastpage
    575
  • Abstract
    Traditional high-level synthesis systems generate a single schedule, and try to minimize the allocation cost for that schedule. Since there are often a large number of schedules for a given problem, this approach prematurely prunes the design space and it may miss many better solutions. The multi-schedule synthesis approach overcomes this deficiency by producing a number of schedules and generating a complete data-path for each schedule. In most cases multi-schedule synthesis not only produces better results but also runs faster than well-known synthesis systems such as HAL, SALSA, and SE
  • Keywords
    logic CAD; logic design; scheduling; HAL; SALSA; SE; allocation cost minimization; data-path; design space pruning; high-level synthesis; multi-schedule approach; Control system synthesis; Cost function; Design optimization; Digital systems; Displays; Hardware; High level synthesis; Optimal scheduling; Scheduling algorithm; Time factors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1994. ICCD '94. Proceedings., IEEE International Conference on
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    0-8186-6565-3
  • Type

    conf

  • DOI
    10.1109/ICCD.1994.331979
  • Filename
    331979