• DocumentCode
    2162715
  • Title

    An ILP solution for simultaneous scheduling, allocation, and binding in multiple block synthesis

  • Author

    Wilson, Thomas C. ; Grewal, Gary W. ; Banerji, Dilip K.

  • Author_Institution
    Dept. of Comput. & Inf. Sci., Guelph Univ., Ont., Canada
  • fYear
    1994
  • fDate
    10-12 Oct 1994
  • Firstpage
    581
  • Lastpage
    586
  • Abstract
    Presents a novel approach to the high-level synthesis problems of scheduling, allocation, and binding for multiblock behavioral descriptions. Our design tool, JOSHUA, uses an integer linear programming (ILP) formulation to solve the three interdependent subproblems simultaneously and optimally. The system allows the designer to minimize time, area, and the number of microwords for the entire design, or for specific segments of the design. A diverse module library provides a selection of modules that can perform a specific operation in differing amounts of time (control steps). A novel feature is the ability to select an implementation for part of an algorithm from among a set of implementation alternatives. The system can also handle the issues of path frequencies, loops, parallel threads of execution, and register allocation
  • Keywords
    integer programming; linear programming; logic CAD; logic design; parallel processing; scheduling; storage allocation; JOSHUA; allocation; area minimization; binding; control steps; design tool; high-level synthesis problems; implementation alternatives; integer linear programming; interdependent subproblems; loops; microwords minimization; module library; multiblock behavioral descriptions; multiple block synthesis; parallel execution threads; path frequencies; register allocation; scheduling; time minimization; Control system synthesis; Frequency locked loops; Frequency synthesizers; High level synthesis; Information science; Libraries; Processor scheduling; Radio spectrum management; Resource management; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1994. ICCD '94. Proceedings., IEEE International Conference on
  • Conference_Location
    Cambridge, MA
  • Print_ISBN
    0-8186-6565-3
  • Type

    conf

  • DOI
    10.1109/ICCD.1994.331981
  • Filename
    331981