DocumentCode
2162923
Title
Improved HW/SW partitioning algorithm on efficient use of hardware resource
Author
Wang, Hao ; Zhang, Hongquan
Author_Institution
Dept. of Electr. & Inf. Eng., Heilongjiang Inst. of Sci. & Technol., Harbin, China
Volume
2
fYear
2010
fDate
26-28 Feb. 2010
Firstpage
682
Lastpage
685
Abstract
This paper improved the greedy partitioning algorithm targeting hardware resource use efficiency in traditional partitioning algorithms. In the improved algorithm, introduced a guiding function, which decided by four factors: the criticality, saved time, frequency and area of tasks. The improved algorithm can not only improve the resource use efficiency, but also pay attention to the task on the critical path, which can maximized the performance of the system. On the basis of this, the designer can design the system with low power methods, minimized the power consumption as well as satisfy the system performance.
Keywords
greedy algorithms; hardware-software codesign; HW/SW partitioning algorithm; critical path; greedy partitioning algorithm; hardware resource; low power methods; saved time; Computer architecture; Embedded system; Energy consumption; Field programmable gate arrays; Frequency; Hardware; Microprocessors; Paper technology; Partitioning algorithms; System performance; HW/SW partitioning; greedy algorithm; guiding function;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer and Automation Engineering (ICCAE), 2010 The 2nd International Conference on
Conference_Location
Singapore
Print_ISBN
978-1-4244-5585-0
Electronic_ISBN
978-1-4244-5586-7
Type
conf
DOI
10.1109/ICCAE.2010.5451727
Filename
5451727
Link To Document