Title :
Highly manufacturable 1 Gb NAND flash using 0.12 /spl mu/m process technology
Author :
Jung-Dal Choi ; Seong-Soon Cho ; Yong-Sik Yim ; Jae-Duk Lee ; Hong-Soo Kim ; Kyung-Joong Joo ; Sung-Hoi Hur ; Heung-Soo Im ; Joon Kim ; Jeong-Woo Lee ; Kang-Ill Seo ; Man-Sug Kang ; Kyung-Hyun Kim ; Jeong-Lim Nam ; Kyu-Charn Park ; Moon-Yong Lee
Author_Institution :
Semicond. R&D Center, Samsung Electron. Co. Ltd., Yongin, South Korea
Abstract :
An 1 Gb NAND flash memory has been successfully developed by integrating new technologies, inverse narrow-width effect (INWE) suppression scheme, 32-cell NAND flash combined with the scaling-down of tunnel oxide, inter-poly ONO, and gate poly re-oxidation. It is implemented using KrF photolithography along with a resolution enhancing technique, the planarized surface by etch-back and CMP processes, highly selective contact etching and nonoverlapped dual damascene metallization. Thus, for the first time, a 1 Gb NAND flash memory with mass-producible chip size of 132 mm/sup 2/, lower Vcc operation below 1.8 V and lower power consumption, has been obtained.
Keywords :
NAND circuits; chemical mechanical polishing; dislocation etching; flash memories; integrated circuit metallisation; low-power electronics; photolithography; 0.12 micron; 1 Gbit; 1.8 V; CMP; KrF photolithography; NAND flash memory; contact etching; etch-back; gate poly re-oxidation; inter-poly ONO; inverse narrow-width effect suppression scheme; mass-producible chip size; nonoverlapped dual damascene metallization; power consumption; resolution enhancing technique; tunnel oxide; Costs; Degradation; Energy consumption; Etching; Lithography; Low voltage; Manufacturing processes; Metallization; Oxidation; Semiconductor device manufacture;
Conference_Titel :
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7050-3
DOI :
10.1109/IEDM.2001.979394
