Title :
Sub 1-V 5-GHz-band up- and down-conversion mixer cores in 0.35-/spl mu/m CMOS
Author :
Wakimoto, T. ; Hatano, T. ; Yamaguchi, C. ; Morimura, H. ; Konaka, S.
Author_Institution :
NTT Lifestyle & Environ. Technol. Labs., Kanagawa, Japan
Abstract :
To lower the supply voltage and reduce the power dissipation of the RF front-end of wireless communication systems, a double-balanced square-law MOSFET mixer is proposed. It is applied to up- and down-conversion mixer cores. Implemented in a 0.35-/spl mu/m CMOS process, the up-conversion mixer core operates with a supply voltage of 0.5 V and a supply current of 0.8 mA in the 5-GHz band. The local leakage is suppressed below -40 dBc. The down-conversion mixer core drains 0.4 mA from a 1-V supply in the same band. The conversion gain is 6 dB and the 3rd-order input-referred intercept point (IIP3) is +5 dBm.
Keywords :
CMOS integrated circuits; MOSFET; Microwave mixers; Potential transformers; Radiocommunication; -40 dB; 0.35 mum; 0.4 mA; 0.5 V; 0.8 mA; 1 V; 3rd-order input-referred intercept point; 5 GHz; 6 dB; CMOS process; RF front-end; conversion gain; double-balanced square-law MOSFET mixer; down-conversion mixer core; local leakage; power dissipation; supply current; supply voltage; up-conversion mixer core; wireless communication systems; Batteries; Dynamic range; Linearity; MOSFET circuits; Power MOSFET; Power dissipation; Power supplies; Radio frequency; Voltage; Wireless communication;
Conference_Titel :
VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-6309-4
DOI :
10.1109/VLSIC.2000.852861
