Title :
Design and analysis of tunable analog circuit using double gate MOSFET at 45nm CMOS technology
Author :
Kushwah, Rajendra Singh ; Akashe, Shyam
Author_Institution :
ITM Univ., Gwalior, India
Abstract :
In this paper, we included designing of low power tunable analog circuits using double gate (DG) MOSFET, where the front gate output is changed by control voltage on the back gate. The DG devices can be used to improve the performance and reduce the power dissipation when front gate and back gate both are independently controlled. In this paper, we included the analysis of the analog tunable circuits such as CMOS Amplifier pair, Schmitt Trigger circuit and Operational trans-conductance Amplifier. Gain, phase and output response of analog tunable circuits have been illustrated in the paper. These circuit blocks are used for low-noise high-performance integrated circuits for analog and mixed-signal applications. The simulation results are predicted by Cadence Virtuoso Tool in 45nm complementary metal oxide semiconductor (CMOS) Technology.
Keywords :
CMOS analogue integrated circuits; MOSFET; low-power electronics; CMOS technology; Cadence Virtuoso tool; DG MOSFET; DG devices; circuit blocks; complementary metal oxide semiconductor technology; control voltage; double gate MOSFET; front gate output; low power tunable analog circuits; low-noise high-performance integrated circuits; mixed-signal applications; power dissipation reduction; size 45 nm; Analog circuits; CMOS integrated circuits; CMOS technology; Hysteresis; Logic gates; MOSFET; Trigger circuits; Analog Tunable Circuits; DG MOSFET; Gain; Phase;
Conference_Titel :
Advance Computing Conference (IACC), 2013 IEEE 3rd International
Conference_Location :
Ghaziabad
Print_ISBN :
978-1-4673-4527-9
DOI :
10.1109/IAdCC.2013.6514465
