Impact of segmentation distribution on area and delay in FPGA routing architectures

In this work we investigate the influence of segment length distribution on area and speed performance in unidirectional island-style FPGA routing architectures using VPR 5.0.2 tool suite. Modern commercial FPGAs use a combination of segments of varying lengths in their routing architectures. We have presented a detailed analysis and comparison between the performance of single segment and mixed segment distributions, which uses a combination of two segment lengths per channel in the routing network. The main goal of this work is to determine the most optimal distribution of segment lengths for superior performance. We also investigate the impact of process technology scaling on performance parameters, namely area and delay, across various segment distributions, by performing simulations at three technology nodes- 45nm, 90nm and 130nm. Our experimental results prove that both mixed segment and single segment distributions show similar performance across technologies. However, mixed length segment distribution show more constancy and uniformity in the area and delay values, as opposed to the steep variation observed across single segment lengths. This feature renders considerable flexibility to the FPGA vendors in the choice of segment length distribution when using mixed segment distributions.