Title :
The effects of dielectric slots on Copper/Low-k interconnects reliability
Author :
Heryanto, A. ; Lim, Y.K. ; Pey, K.L. ; Liu, W. ; Tan, J.B. ; Sohn, D.K. ; Hsia, L.C.
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
Abstract :
The effects of dielectric slots on Cu/Low-k interconnects reliability were studied. Dielectric slots were proven to be effective in suppressing stress-induced void failure but their impact on EM reliability was found to be minimal. Physical failure analysis and finite element simulations were used to explain the possible mechanisms associated to the different effects of dielectric slots on Cu/low-k reliability.
Keywords :
copper; failure analysis; finite element analysis; integrated circuit interconnections; low-k dielectric thin films; reliability; Cu; EM reliability; copper-low-k interconnects reliability; dielectric slots; finite element simulations; physical failure analysis; Copper; Current density; Dielectrics; Electromigration; Failure analysis; Grain boundaries; Grain size; Morphology; Reservoirs; Testing;
Conference_Titel :
Interconnect Technology Conference, 2009. IITC 2009. IEEE International
Conference_Location :
Sapporo, Hokkaido
Print_ISBN :
978-1-4244-4492-2
Electronic_ISBN :
978-1-4244-4493-9
DOI :
10.1109/IITC.2009.5090349
