Title :
Comparative delay, noise and energy of high-performance domino adders with stack node preconditioning (SNP)
Author :
Yibin Ye ; Tschanz, J. ; Narendra, S. ; Borkar, S. ; Stan, M. ; De, V.
Author_Institution :
Microprocessor Res. Labs., Intel Corp., Hillsboro, OR, USA
Abstract :
Stack node preconditioning (SNP) and "mutex" techniques for charge-sharing noise reduction are incorporated into the critical path gates containing transistor stacks in 32-bit domino adders to simultaneously improve best achievable performance by 10% and reduce charge-sharing noise by 2/spl times/ in circuits containing transistor stacks.
Keywords :
Adders; CMOS logic circuits; Delays; Integrated circuit design; Integrated circuit noise; 32 bit; CMOS logic; charge-sharing noise reduction; critical path gates; high-performance domino adders; mutex techniques; stack node preconditioning; transistor stacks; Adders; CMOS logic circuits; Circuit noise; Clocks; Degradation; Delay; Integrated circuit noise; Logic circuits; Noise reduction; Threshold voltage;
Conference_Titel :
VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on
Conference_Location :
Honolulu, HI, USA
Print_ISBN :
0-7803-6309-4
DOI :
10.1109/VLSIC.2000.852886
