Title :
Examination of design and manufacturing issues in a 10 nm double gate MOSFET using nonequilibrium Green´s function simulation
Author :
Ren, Z. ; Venugopal, R. ; Datta, S. ; Lundstrom, M.
Author_Institution :
Purdue Univ., West Lafayette, IN, USA
Abstract :
The double gate (DG) MOSFET and similar structures provide the electrostatic integrity needed to scale devices to their limits. In this paper, we use a non-equilibrium Green´s function (NEGF) approach to examine 10 nm-scale device design and manufacturing issues realistically. NEGF simulations are used to examine: (i) choice of body thickness, (ii) effect of body thickness variations, (iii) the required junction abruptness, (iv) sensitivity of the device to gate-S/D (source/drain) over/underlap, and (v) the impact of metal-semiconductor contact resistance. The results of this study identify key device challenges for 10 nm-scale MOSFETs.
Keywords :
Green´s function methods; MOSFET; carrier mobility; contact resistance; digital simulation; leakage currents; nanotechnology; semiconductor device manufacture; semiconductor device models; semiconductor-metal boundaries; 10 nm; body thickness variations; channel mobility; double gate MOSFET; electrostatic integrity; gate stack design; gate tunneling model; gate underlap; gate-source/drain overlap; junction abruptness; leakage current distribution; manufacturing issues; metal-semiconductor contact resistance; metallurgical gate length; mobility degradation; n-MOSFET; n-channel MOSFET; nanoMOS simulation tool; nanoscale transistors; nonequilibrium Green´s function; quantum mechanical scattering model; scaling limits; short channel requirements; Degradation; Doping; Green´s function methods; Leakage current; MOSFET circuits; Manufacturing; Particle scattering; Semiconductor process modeling; Silicon; Threshold voltage;
Conference_Titel :
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7050-3
DOI :
10.1109/IEDM.2001.979435
