A 1.5-V 900-MHz monolithic CMOS fast-switching frequency synthesizer for wireless applications

Author

Chi-Wa Lo ; Luong, H.C.

Author_Institution

Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China

fYear

2000

fDate

15-17 June 2000

Firstpage

238

Lastpage

241

Abstract

A new architecture for phase-locked-loop frequency synthesizers which employs a switchable-capacitor array to tune the output frequency is proposed. It provides many advantages, including simplified analog circuitry, low supply voltage, low power consumption, small chip area, fast frequency switching and high immunity of substrate noise. A prototype is designed for 1.5 V and consumes 30 mW. The total chip area is 0.9/spl times/1.1 mm/sup 2/. The settling time is less than 150 /spl mu/sec and the phase noise is -118 dBc/Hz at 600 KHz offset.

Keywords

CMOS analog integrated circuits; Circuit tuning; Field effect MMIC; Frequency synthesizers; Integrated circuit noise; Phase locked loops; Phase noise; Switched capacitor networks; UHF integrated circuits; 1.5 V; 30 mW; 900 MHz; CMOS; chip area; fast-switching frequency synthesizer; output frequency tuning; phase noise; phase-locked-loop frequency synthesizers; power consumption; settling time; substrate noise; supply voltage; switchable-capacitor array; wireless applications; Circuit noise; Energy consumption; Frequency synthesizers; Low voltage; Phase locked loops; Phase noise; Phased arrays; Power supplies; Prototypes; Switching circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits, 2000. Digest of Technical Papers. 2000 Symposium on

Conference_Location

Honolulu, HI, USA

Print_ISBN

0-7803-6309-4

Type

conf

DOI

10.1109/VLSIC.2000.852901

Filename

852901