Title :
Double gate dynamic threshold voltage (DGDT) SOI MOSFETs for low power high performance designs
Author :
Wei, Liqiong ; Chen, Zhanping ; Roy, Kaushik
Author_Institution :
Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
Abstract :
In this paper, double gate dynamic threshold voltage (DGDT) SOI MOSFETs, which combine the advantages of DTMOS and FD SOI MOSFETs without the limitation of the supply voltage, are simulated using SOI-SPICE4.4. The threshold voltages, leakage currents and drive currents for FD SOI MOSFETs and DGDT SOI MOSFETs are compared. DGDT SOI MOSFETs show symmetric characteristics and the best IonI(off)/. Excellent DC inverter characteristics down to 0.15 V and good full adder performance at 1V are shown. The propagation delay and the average power consumption of the full adder are 0.625 ns and 11.5 μW, respectively. It can be seen that DGDT SOI MOSFET is a good candidate for low power high performance designs
Keywords :
CMOS logic circuits; MOSFET; SPICE; adders; delays; integrated circuit design; leakage currents; logic gates; semiconductor device models; silicon-on-insulator; 0.15 to 1 V; 0.625 ns; 11.5 muW; DC inverter characteristics; SOI MOSFETs; SOI-SPICE4.4; Si; average power consumption; double gate dynamic threshold voltage; drive currents; full adder performance; leakage currents; low power design; propagation delay; supply voltage; symmetric characteristics; Capacitance; Circuits; Energy consumption; Leakage current; Low voltage; MOSFETs; Silicon; Threshold voltage; Very large scale integration; Voltage control;
Conference_Titel :
SOI Conference, 1997. Proceedings., 1997 IEEE International
Conference_Location :
Fish Camp, CA
Print_ISBN :
0-7803-3938-X
DOI :
10.1109/SOI.1997.634943
