Understanding soft and hard breakdown statistics, prevalence ratios and energy dissipation during breakdown runaway

Author

Sune, J. ; Wu, E.Y. ; Jimenez, D. ; Vollertsen, R.P. ; Miranda, E.

Author_Institution

Departament d´Enginyeria Electronica, Univ. Autonoma de Barcelona, Spain

fYear

2001

fDate

2-5 Dec. 2001

Abstract

Since some MOS digital circuits could remain functional after gate oxide breakdown (BD) provided that the post-BD resistance is high enough (1), the separate consideration of soft (SBD) and hard (HBD) breakdown events is necessary to set up an adequate application-specific reliability assessment methodology. In this work we deal with two relevant issues related to this problem. First, we study the statistics of SBD and HBD and their relation to the first-event BD statistical distribution as a function of their prevalence ratios. Second, we consider the modeling of the BD runaway as a means to determine these prevalence ratios as a function of stress conditions and device geometry.

Keywords

MOS digital integrated circuits; application specific integrated circuits; integrated circuit reliability; semiconductor device breakdown; statistical analysis; MOS digital circuits; application-specific reliability assessment methodology; breakdown runaway; device geometry; energy dissipation; gate oxide breakdown; hard breakdown statistics; post-BD resistance; prevalence ratios; soft breakdown statistics; statistical distribution; stress conditions; Digital circuits; Electric breakdown; Energy dissipation; Microelectronics; Rivers; Solid modeling; Statistical distributions; Statistics; Stress; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7050-3

Type

conf

DOI

10.1109/IEDM.2001.979446

Filename

979446