DocumentCode
2164741
Title
A multiple-valued logic with merged single-electron and MOS transistors
Author
Inokawa, H. ; Fujiwara, A. ; Takahashi, Y.
Author_Institution
NTT Basic Res. Labs., NTT Corp., Kanagawa, Japan
fYear
2001
fDate
2-5 Dec. 2001
Abstract
Proposes merged single-electron and MOS devices that serve as basic components of multiple-valued logic, such as a universal literal gate and a quantizer. We verified their operation by using single-electron transistors and MOSFETs fabricated on the same wafer by pattern-dependent oxidation process. We also discuss their application to an analog-to-digital converter and a multiple-valued adder.
Keywords
MOSFET; adders; analogue-digital conversion; logic gates; multivalued logic circuits; oxidation; single electron transistors; analog-to-digital converter; merged single-electron/MOS transistors; multiple-valued adder; multiple-valued logic; pattern-dependent oxidation process; quantizer; universal literal gate; Adders; Analog-digital conversion; Circuits; Logic devices; MOSFETs; Oxidation; Single electron transistors; Stability; Threshold voltage; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Conference_Location
Washington, DC, USA
Print_ISBN
0-7803-7050-3
Type
conf
DOI
10.1109/IEDM.2001.979453
Filename
979453
Link To Document