A record high 150 GHz f/sub max/ realized at 0.18 /spl mu/m gate length in an industrial RF-CMOS technology

Author

Tiemeijer, L.F. ; Boots, H.M.J. ; Havens, R.J. ; Scholten, A.J. ; de Vreede, P.H.W. ; Woerlee, P.H. ; Heringa, A. ; Klaassen, D.B.M.

Author_Institution

Philips Res. Lab., Eindhoven, Netherlands

fYear

2001

fDate

2-5 Dec. 2001

Abstract

We demonstrate that by careful layout optimisation, particularly aimed at reducing the effective gate resistance, a record high maximum oscillation frequency f/sub max/ of 150 GHz can be obtained for an industrial 0.18 /spl mu/m CMOS process showing a cut-off frequency f/sub T/ of 70 GHz. A very low minimum noise figure and good suppression of the substrate noise using a guard-ring is also shown.

Keywords

CMOS integrated circuits; circuit optimisation; integrated circuit layout; integrated circuit noise; integrated circuit technology; 0.18 micron; 150 GHz; 70 GHz; cut-off frequency; effective gate resistance; guard-ring; industrial RF-CMOS technology; layout optimisation; maximum oscillation frequency; minimum noise figure; substrate noise; Admittance measurement; Circuits; Cutoff frequency; Electrical resistance measurement; Fingers; Frequency measurement; Immune system; Medical simulation; Radio frequency; Silicidation;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7050-3

Type

conf

DOI

10.1109/IEDM.2001.979471

Filename

979471