DocumentCode :
2165243
Title :
Spill code minimization by spill code motion
Author :
Koseki, Akira ; Komatsu, Hideaki ; Nakatani, Toshio
Author_Institution :
IBM Tokyo Res. Lab., Kanagawa, Japan
fYear :
2003
fDate :
27 Sept.-1 Oct. 2003
Firstpage :
125
Lastpage :
134
Abstract :
We aim at minimizing the spill costs. Spill cost minimization heuristics that have been researched sometimes work in unexpected ways due to the lack of precise knowledge of registers availability, which can be obtained only after register allocation is all finished. Different from previous techniques, our approach, called spill code motion, tries to eliminate redundancy among spill code. This works as a variation of commonly used code motion techniques. After Chaitin-style graph coloring with naive live range splitting, spill-in instructions are first hoisted as long as registers are available and until they reach spill-out instructions. Unnecessarily hoisted spill-in instructions are then sunk. The experimental results show our approach yields up to a 10% performance increase compared to the latest spill code minimization technique in the case of using small number of registers.
Keywords :
graph colouring; instruction sets; optimising compilers; redundancy; Chaitin-style graph coloring; register allocation; register availability; spill code minimization; spill code motion; spill code redundancy; spill-in instruction; Abstracts; Computer aided instruction; Costs; Hardware; Interference; Laboratories; Optimizing compilers; Parallel architectures; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Architectures and Compilation Techniques, 2003. PACT 2003. Proceedings. 12th International Conference on
ISSN :
1089-795X
Print_ISBN :
0-7695-2021-9
Type :
conf
DOI :
10.1109/PACT.2003.1238009
Filename :
1238009
Link To Document :
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