Implementation of a phase-locked loop clock recovery module for 40 Gb/s optical receivers

A low-cost, high-performance clock recovery (CR) module using a phase-locked loop (PLL) for 40 Gb/s optical receivers have been successfully designed and implemented. The recovered 40 GHz clock is synchronized with a stable 10 GHz VC-DRO. The timing jitter of the implemented PLL clock recovery module is significantly reduced as compared with the conventional open-loop type clock recovery module with a DR filter. The measured RMS jitter with the phase-locked CR module is about 250 fs. In addition, the CR module has been operated error-free during a 30-minute BER test with 40 Gb/s optical transceivers.