DocumentCode
2165380
Title
Logarithmic conversion by four partitioned hybrid-ROMs
Author
Lo, Hao-Yung ; Lin, Hsiu-Feng ; Ho, Yue-Yuan
Author_Institution
Dept. of Inf. Eng., Feng Chia Univ., Taichung, Taiwan
fYear
1996
fDate
12-14 Jun 1996
Firstpage
550
Lastpage
552
Abstract
The logarithmic number systems (LNS) have long been used in arithmetic to simplify processes such as: multiplication to addition, division to subtraction, and powers to multiplication, etc. A difficult problem may arise from the accuracy of conversion during the processing operations and a very large number of product terms should be generated if a look-up table is realized by a ROM. In some cases, it may be impossible to use such a large capacity ROM (say, 224×24) if no partitioned scheme is used. This paper presents a four-partition conversion scheme in order to be implemented by small sized ROMs. It can generate better results and higher speed conversion comparing with previous methods for two- or three-partition schemes. This algorithm can also be used in conversion of antilogarithms
Keywords
arithmetic; digital arithmetic; antilogarithms; four-partition conversion; hybrid-ROMs; logarithmic number systems; partitioned scheme; Arithmetic; Circuits; Councils; Equations; Hardware; Partitioning algorithms; Power engineering and energy; Read only memory; Table lookup; Taylor series;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel Architectures, Algorithms, and Networks, 1996. Proceedings., Second International Symposium on
Conference_Location
Beijing
ISSN
1087-4089
Print_ISBN
0-8186-7460-1
Type
conf
DOI
10.1109/ISPAN.1996.509040
Filename
509040
Link To Document