Automated hardware design using genetic programming, VHDL, and FPGAs

Author

Popp, Robert L. ; Montana, David J. ; Gassner, Richard R. ; Vidaver, Gordon ; Iyer, Suraj

Author_Institution

Alphatech Inc., Burlington, MA, USA

Volume

3

fYear

1998

fDate

11-14 Oct 1998

Firstpage

2184

Abstract

We have developed a completely automated approach to hardware design based on integrating three core technologies into one comprehensive system, namely genetic programming (GP), the VHSIC Hardware Description Language (VHDL) and field programmable gate arrays (FPGAs). Our system uses an automated GP engine, as opposed to a human designer, to evolve a hardware design composed of one or more FPGAs that will maximally achieve an application´s software requirements. Several variants of our system exist; other variants are currently under development. The focus of this paper is to describe our original system design and its most recent revision to date

Keywords

circuit optimisation; configuration management; field programmable gate arrays; genetic algorithms; hardware description languages; logic CAD; FPGA; VHDL; VHSIC Hardware Description Language; automated hardware design; field programmable gate arrays; genetic programming; hardware design evolution; software requirements; system variants; Adaptive systems; Application software; Design optimization; Encoding; Engines; Field programmable gate arrays; Genetic programming; Hardware design languages; Humans; Very high speed integrated circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Systems, Man, and Cybernetics, 1998. 1998 IEEE International Conference on

Conference_Location

San Diego, CA

ISSN

1062-922X

Print_ISBN

0-7803-4778-1

Type

conf

DOI

10.1109/ICSMC.1998.724979

Filename

724979