Title :
A highly manufacturable, low-thermal budget, void and seam free pre-metal-dielectric process using new SOG for beyond 60nm DRAM and other devices
Author :
Juseon Goo ; Eunkee Hong ; Hong-Gun Kim ; Hyun Jo Kim ; Eun Kyung Baek ; Sun-Hoo Park ; Jubum Lee ; Hyeon Deok Lee ; Ho-Kyu Kang ; Joo-Tae Moon
Author_Institution :
Semicond. R&D, Samsung Electron. Co, Kyunggi-Do, South Korea
Abstract :
New PMD (Pre-Metal Dielectric) process by employing polysilazane based inorganic SOG (spin-on-glass) is suggested for future VLSI devices. Compared with conventional SOG materials, the film made from new SOG has higher wet etch resistance, which is critical in achieving deformation-free contact profile. Additional advantages of using this new SOG process are excellent gap-fill capability upto an aspect ratio (A/R) of 20 and lower thermal budget than BPSG reflow process. Neither detrimental effect of new SOG PMD process on electrical characteristics nor device performance such as refresh characteristic, compared to HDPCVD SiO/sub 2/ was observed, indicating this is a PMD process of choice for the future devices.
Keywords :
DRAM chips; VLSI; dielectric thin films; etching; integrated circuit technology; 60 nm; DRAM; VLSI device manufacture; aspect ratio; electrical characteristics; polysilazane inorganic spin-on-glass film; pre-metal-dielectric process; thermal budget; void-free seam-free gap filling; wet etch resistance; Annealing; Cleaning; Contact resistance; Electric variables; Manufacturing processes; Moon; Random access memory; Semiconductor device manufacture; Very large scale integration; Wet etching;
Conference_Titel :
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7050-3
DOI :
10.1109/IEDM.2001.979482
