Title :
A general partition scheme for gate leakage current suitable for MOSFET compact models
Author :
Wei-Kai Shih ; Rios, R. ; Packan, P. ; Mistry, K. ; Abbott, T.
Author_Institution :
Technol. CAD, Intel Corp., Santa Clara, CA, USA
Abstract :
For the first time, it is rigorously shown that the source/drain partition of gate leakage current in a MOSFET is identical to that of inversion charge. This paper provides model developers a general recipe in addressing the partition issue and enables more consistent model parameter extraction methodology for MOSFETs in sub-100 nm technology.
Keywords :
MOSFET; leakage currents; semiconductor device models; MOSFET; compact models; current continuity equation; gate leakage current; inversion charge; model parameter extraction methodology; source/drain partition; strong tunneling regime; sub-100 nm technology; weak tunneling regime; Educational institutions; Equations; Gate leakage; Green´s function methods; Intrusion detection; Leakage current; MOSFET circuits; Surface treatment; Telephony; Tunneling;
Conference_Titel :
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7050-3
DOI :
10.1109/IEDM.2001.979487
