Analytical model of the programming characteristics of scaled MONOS memories with a variety of trap densities and a proposal of a trap-density-modulated MONS memory

Author

Nomoto, K. ; Fujiwara, U. ; Aozasa, H. ; Terano, T. ; Kobayashi, T.

Author_Institution

Semicond. Network Co., Sony Corp., Kanagawa, Japan

fYear

2001

fDate

2-5 Dec. 2001

Abstract

Investigated the relation between the density of Si-H/N-H bonds and the programming characteristics of scaled metal-oxide-nitride-oxide-semiconductor (MONOS) memory devices and developed an analytical model for programming characteristics of the MONOS devices having a variety of trap densities. The model was validated experimentally. We apply the model to a metal-oxide-nitride-semiconductor (MONS) memory device with trap-density modulation in the nitride layer. The result shows the MONS memory is programmed faster and at lower-voltage than the conventional MONOS memory device.

Keywords

MOS memory circuits; electron traps; integrated circuit modelling; low-power electronics; Si-Si/sub 3/N/sub 4/-SiN/sub x/-SiO/sub 2/; Si-SiO/sub 2/-Si/sub 3/N/sub 4/-SiO/sub 2/-Si; analytical model; low-voltage programming; programming characteristics; scaled MONOS memories; trap densities; trap-density modulation; trap-density-modulated MONS memory; Analytical models; Atomic layer deposition; Electron traps; Low voltage; MONOS devices; Numerical models; Proposals; Scalability; Substrates; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7050-3

Type

conf

DOI

10.1109/IEDM.2001.979489

Filename

979489