A Dolby AC-3/MPEG1 audio decoder core suitable for audio/visual system integration

A synthesizable Dolby AC-3/MPEG1 audio decoder core has been developed for use in audio/visual system LSIs. In order to optimize the core both in size and power consumption, it employs a dedicated design approach rather than a DSP approach. Moreover, the core is designed to operate at 27 MHz, which is slower than reported DSP implementations, and is useful for integration with digital video decoders. An experimental decoder chip has successfully fabricated using a 0.35 um cell-based CMOS technology, to evaluate the AC-3/MPEG1 audio decoder core. Because the chip integrates a 61 Kbit RAM with the core, it can achieve 5.1 ch AC-3 decoding by single-chip. The developed and evaluated decoder core is utilized in variable digital audio/video system chips, including single-chip DVD A/V decoders