COB stack DRAM cell technology beyond 100 nm technology node

In this paper, the key technologies for future DRAM cells are investigated based on the COB stack cell for DRAM technology generations from 0.15 /spl mu/m node to 70 nm node. The issues and directions for 6 key technology areas are suggested for each technology node. Beyond 100 nm node, it will be very difficult to meet the various requirements of array transistor and capacitor. The planar array transistor with spike-doped channel, MSE-STI, low parasitic BL and MIM capacitor can lead 8F2 COB DRAM cells to be very promising even down to 70 nm node compared to other DRAM cells such as trench cell, 6F2 or 4F2 cell.