New Linear SEC-DED Codes with Reduced Triple Bit Error Miscorrection Probability

This paper solves the problem of minimizing triple bit error miscorrection for single-error-correcting, double-error-detecting codes (SEC-DED codes) which are used to protect all kinds of memory against errors. A lower bound for triple bit error miscorrection for the widely used class of odd-weight column codes is derived and actual codes which are very close to that theoretical bound are presented. Surprisingly, significantly better results are obtained with shortened generalized Hamming codes. An optimal (39,32)-SEC-DED code with 32 information bits and 7 control bits is determined which has the lowest risk of triple bit miscorrection of any possible linear (39,32)-code. It is shown how codes with 64 and 128 information bits with significantly lower triple bit miscorrection probability than currently used codes can be derived from that code.The new codes also feature adjacent double bit error correction capabilities (SEC-DED-DAEC codes). Employing them in a SEC-DED-DAEC checker reduces the risk of miscorrecting non-adjacent double bit errors by 27-34% compared to the best codes known.