Title :
A 0.13 /spl mu/m logic-based embedded DRAM technology with electrical fuses, Cu interconnect in SiLK/sup TM/, sub-7 ns random access time and its extension to the 0.10 /spl mu/m generation
Author :
Klee, V. ; Norum, J. ; Weaver, Rhiannon ; Iyer, S.S.K. ; Kothandaraman, C.R. ; Chiou, Jie-Yang ; Chen, Mei ; Kusaba, N. ; Lasserre, S. ; Liang, Chulong ; Liu, Jiangchuan ; Lu, Albert ; Parries, P.R. ; Park, Bong Joo ; Rice, J. ; Robson, Norman ; Shum, D.
Author_Institution :
Infineon Technol., Hopewell Junction, NY, USA
Abstract :
Embedded DRAM (eDRAM) has been fabricated successfully with 0.13 /spl mu/m technology for the first time using Cu interconnects and low-/spl kappa/ SiLK/sup TM/ dielectric. Sub-7 ns random access time has been achieved. Extension of the technology to 0.10 /spl mu/m and electrical fuse (eFuse) implementation for flexible redundancy are also described.
Keywords :
CMOS memory circuits; DRAM chips; electric fuses; embedded systems; integrated circuit interconnections; integrated circuit reliability; 0.10 micron; 0.13 micron; 7 ns; CMOS platform; Cu; Cu interconnect; electrical fuses; electrical macro results; flexible redundancy; logic based deep trench capacitor embedded DRAM technology; logic-based embedded DRAM technology; low-/spl kappa/ SiLK dielectric; random access time; Built-in self-test; Dielectrics; Etching; Foundries; Fuses; Implants; Logic arrays; Logic design; Logic devices; Random access memory;
Conference_Titel :
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7050-3
DOI :
10.1109/IEDM.2001.979523
