Low cost wafer-level CSP: a novel redistribution methodology

A chip scale package using wafer scale processing was developed for a line of low cost, small form factor integrated circuits. The package uses polymeric repassivation and electrodeposited solder bumps connected by a unique conductor patterning method. As an alternative to the aluminum redistribution approach for converting wirebond designs to CSP, a low cost method was developed. Called single-mask redistribution (SMR), this process creates the solder bump and the redistribution line in a single patterning step. Solder is plated to an equal height on both the line and the bump pad and, during reflow, hydrostatic pressure causes the excess solder on the line to flow to the bump. The finished package resembles a common chip resistor. Reliability testing was used to optimize the bump design and the assembly methodologies. Field performance of more than 30 million packages has validated the test results