A single chip DVB receiver for variable-rate QPSK demodulation and forward error correction

Author

Lee, Seung-Jun ; Baek, Jong-Seob ; Paff, Michael ; Koo, Bon-tae ; Hwang, Gyu-Tae ; Choi, Young-Shig ; Kim, Tae-Geun

Author_Institution

Hyundai Electron. Ind., Kyoungki, South Korea

fYear

1997

fDate

5-8 May 1997

Firstpage

249

Lastpage

252

Abstract

This paper describes a single chip DVB compliant receiver that integrates a variable rate QPSK demodulator with a Viterbi decoder, de-interleaver, and a Reed-Solomon decoder. Using a fixed rate sampling clock it handles continuously variable symbol rate from 1 Msps to 45 Msps. Careful floor planning and flat place and route squeezed the 116,000 nand-equivalent gate design into an area of 38.8 mm². It has been fabricated with a 0.5 μm CMOS TLM process. It has been extensively tested in a real-world set-up and proved fully functional

Keywords

CMOS digital integrated circuits; Reed-Solomon codes; Viterbi decoding; digital television; forward error correction; quadrature phase shift keying; television broadcasting; television receivers; 0.5 micron; CMOS TLM process; Reed-Solomon decoder; Viterbi decoder; de-interleaver; forward error correction; single chip DVB receiver; variable-rate QPSK demodulation; CMOS process; Clocks; Decoding; Demodulation; Digital video broadcasting; Quadrature phase shift keying; Reed-Solomon codes; Sampling methods; Testing; Viterbi algorithm;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997

Conference_Location

Santa Clara, CA

Print_ISBN

0-7803-3669-0

Type

conf

DOI

10.1109/CICC.1997.606623

Filename

606623