Coupled Si and SiO/sub 2/ Monte Carlo device simulator for accurate gate current calculation

Author

Ezaki, T. ; Nakasato, H. ; Hane, M.

Author_Institution

Silicon Syst. Res. Labs., NEC Corp., Sagamihara, Japan

fYear

2001

fDate

2-5 Dec. 2001

Abstract

A new MOSFET device simulator has been developed based on a coupled Monte Carlo procedure for the carrier transport in both Si and SiO/sub 2/ regions. This simulator accounts for the image force effect that modulates potential barrier height for the electrons injected into the SiO/sub 2/. Gate currents are calculated combining both the hot carrier injection and the back-scattering from the SiO/sub 2/ region arising from the potential modulation. Flash memory cell simulations were performed by this method. The actual MOSFET gate currents and the programming characteristics of the flash memory cells could be reproduced quantitatively without using any adjustable parameters.

Keywords

MOSFET; Monte Carlo methods; electric current; flash memories; hot carriers; particle backscattering; semiconductor device models; silicon; silicon compounds; simulation; Gate Current Calculation; MOSFET device simulator; MOSFET gate cur-rents; Si; Si region; SiO/sub 2/; SiO/sub 2/ region; backscattering; carrier transport; coupled Monte Carlo procedure; flash memory cell simulations; hot carrier injection; image force effect; potential barrier height modulation; programming characteristics; Effective mass; Electrons; Flash memory cells; Impact ionization; MOSFET circuits; Monte Carlo methods; Particle scattering; Phonons; Silicon; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International

Conference_Location

Washington, DC, USA

Print_ISBN

0-7803-7050-3

Type

conf

DOI

10.1109/IEDM.2001.979551

Filename

979551