Title :
New reliable error-detection codes with fast implementations
Author_Institution :
Naval Res. Lab., Washington, DC, USA
Abstract :
This paper presents a technique for constructing a new class of reliable codes that have efficient software and hardware implementations as well as flexible design parameters such as usable codeword lengths and error-detecting capability. Furthermore, in contrast to the slow bitwise procedure often used for the cyclical redundancy codes, the new codes are bytewise-oriented; hence, they are more easily implemented in modern computers and networks
Keywords :
cyclic codes; error detection codes; redundancy; reliability; bytewise-oriented codes; cyclical redundancy codes; error-detecting capability; fast implementations; flexible design parameters; hardware; reliable error-detection codes; slow bitwise procedure; software; usable codeword lengths; Application software; Computer errors; Computer networks; Cyclic redundancy check; Hardware; Internet; Laboratories; Parity check codes; Polynomials; Protocols;
Conference_Titel :
Military Communications Conference, 1996. MILCOM '96, Conference Proceedings, IEEE
Conference_Location :
McLean, VA
Print_ISBN :
0-7803-3682-8
DOI :
10.1109/MILCOM.1996.569197
