DocumentCode :
2166934
Title :
Fault Tolerant Reversible Finite Field Arithmetic Circuits
Author :
Mathew, Jimson ; Singh, Jawar ; Taleb, Anas Abu ; Pradhan, Dhiraj K.
Author_Institution :
Dept. of Comput. Sci., Univ. of Bristol, Bristol
fYear :
2008
fDate :
7-9 July 2008
Firstpage :
188
Lastpage :
189
Abstract :
In this paper, we present a systematic method for the designing fault tolerant reversible arithmetic circuits for finite field or Galois fields of the form GF(2m). To tackle the problem of errors in computation, we propose error detection and correction using multiple parity prediction technique based on low density parity check (LDPC) code. For error detection and correction, we need additional garbage outputs. Our technique, when compared with traditional fault tolerant approach gives better implementation cost.
Keywords :
Galois fields; arithmetic codes; error correction; error detection; parity check codes; Galois fields; error correction; error detection; fault tolerant reversible finite field arithmetic circuits; low density parity check code; multiple parity prediction technique; Arithmetic; Circuits; Costs; Design methodology; Error correction; Error correction codes; Fault tolerance; Fault tolerant systems; Galois fields; Parity check codes; Error Correction; Fault Tolerance; Finite Field; Reversible Logic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
On-Line Testing Symposium, 2008. IOLTS '08. 14th IEEE International
Conference_Location :
Rhodes
Print_ISBN :
978-0-7695-3264-6
Type :
conf
DOI :
10.1109/IOLTS.2008.35
Filename :
4567090
Link To Document :
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