Floating-gate CMOS analog memory cell array

Author

Harrison, Reid R. ; Hasler, Paul ; Minch, Bradley A.

Author_Institution

Comput. & Neural Syst. Program, California Inst. of Technol., Pasadena, CA, USA

Volume

2

fYear

1998

fDate

31 May-3 Jun 1998

Firstpage

204

Abstract

The complexity of analog VLSI systems is often limited by the number of pins on a chip rather than by the die area. Currently, many analog parameters and biases are stored off chip. Moving parameter storage on chip could save pins and allow us to create complex programmable analog systems. In this paper, we present a design for an on-chip non-volatile analog memory cell that can be configured in addressable arrays and programmed easily. We use floating-gate MOS transistors to store charge, and we use the processes of tunneling and hot-electron injection to program values. We achieve greater than 13-bit precision with no crosstalk between memory cells

Keywords

CMOS analogue integrated circuits; CMOS memory circuits; VLSI; analogue processing circuits; analogue storage; cellular arrays; hot carriers; mixed analogue-digital integrated circuits; tunnelling; CMOS analog memory cell array; addressable arrays; analog VLSI systems; charge storage; complex programmable analog systems; floating-gate CMOS memory cell; floating-gate MOS transistors; hot-electron injection; onchip nonvolatile memory cell; tunneling; Analog computers; Analog memory; CMOS technology; Nonvolatile memory; Pins; Potentiometers; Secondary generated hot electron injection; Tunneling; Very large scale integration; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on

Conference_Location

Monterey, CA

Print_ISBN

0-7803-4455-3

Type

conf

DOI

10.1109/ISCAS.1998.706877

Filename

706877