Title :
Hazard elimination in two-valued logic functions using multi-valued techniques
Author_Institution :
Dipartimento di Autom. e Inf., Politecnico di Torino, Italy
Abstract :
This paper presents an approach to the construction of hazard-free implementations of logic functions using multi-valued gates, making possible a cost analysis inclusive of all such types of realizations. The reliability of different networks is also considered, and trade-offs between cost and reliability are discussed
Keywords :
Boolean functions; hazards and race conditions; many-valued logics; reliability; cost analysis; hazard-free implementations; multi-valued gates; network reliability; two-valued logic functions; Boolean algebra; Boolean functions; Cost function; Hazards; Lattices; Logic functions;
Conference_Titel :
Electrical and Computer Engineering, 1993. Canadian Conference on
Conference_Location :
Vancouver, BC
Print_ISBN :
0-7803-2416-1
DOI :
10.1109/CCECE.1993.332195
