RF-interconnect for future inter- and intra-ULSI communications

Future ULSI interconnect system demands extremely high data rate (up to 100Gbps/channel or 20Tbps/chip) as well as multi-I/O service, re-configurable and fault-tolerant computing/processing architecture and total compatibility with the mainstream silicon CMOS and MCM technologies. In this paper, we present a novel RF-interconnect system that promises to meet all of those system needs. The intended "active" RF-interconnect is based on principles of near-field capacitive coupling, low-loss microwave signal transmission and modern multiple-access algorithms (such as CDMA and FDMA) for shared transmission medium. We will address issues relevant to RF-interconnect system design and discuss its advantages in speed, signal integrity and channel reconfiguration. As a proof of concept, we have realized on-chip 2/spl times/2 CDMA-interconnect system and FDMA/CDMA combined RF-interconnects in 0.18/spl mu/m CMOS with complete functions of signal coupling, transmission and channel reconfiguration at the clock speed of f/sub clk/=2.8GHz and 5GHz RF carrier.