DocumentCode :
2167332
Title :
Bridging the gap: package level and system level thermal modeling
Author :
Wang, W. ; Liou, S. ; Sun, Y.S. ; Lai, J.Y. ; Tien, C. ; Her, T.D. ; Michael, M.
Author_Institution :
Siliconware USA Inc., San Jose, CA, USA
fYear :
2000
fDate :
2000
Firstpage :
287
Lastpage :
293
Abstract :
The thermal performance is one of the critical issues in electronic packaging. The thermal data provided by the packaging suppliers are normally on the package level. This is very informative for comparing different packages. The system customers, on the other hand, are more concerned about the package thermal performance in their specific systems. This paper has investigated the methodology of correlating the data of these two different levels. The CFD tool Flotherm has been used for both package level and system level modeling. For package level modeling, the results are compared with the standard JEDEC testing data. For system level modeling, a critical ASIC chip is packaged in a standard BGA package mounted on a custom board. There are other chips on the board such as memories and a power device. The custom board is installed in a PC system. The various components are modeled at different levels of detail, including full detail model, lumped model, and simple compact model. The focus here is to determine the junction temperature of the critical ASIC component in the complex system. The modeling is optimized for this purpose to reduce computation cost. The two levels of modeling have very different length scales, which makes the correlation between them challenging job. This paper investigated the possibility and sensitivity of such simulation. It is demonstrated that properly conducted computer modeling can be a powerful tool for both package thermal characterization and system thermal design
Keywords :
application specific integrated circuits; ball grid arrays; computational fluid dynamics; integrated circuit packaging; thermal management (packaging); ASIC chip; BGA package; CFD tool; Flotherm; computer model; electronic packaging; package level model; system level model; thermal characteristics; Application specific integrated circuits; Computational efficiency; Computational fluid dynamics; Cost function; Electronic packaging thermal management; Electronics packaging; Power system modeling; Temperature sensors; Testing; Thermal conductivity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Components & Technology Conference, 2000. 2000 Proceedings. 50th
Conference_Location :
Las Vegas, NV
Print_ISBN :
0-7803-5908-9
Type :
conf
DOI :
10.1109/ECTC.2000.853165
Filename :
853165
Link To Document :
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