DocumentCode :
2167920
Title :
80 nm poly-Si gate CMOS with HfO/sub 2/ gate dielectric
Author :
Hobbs, C. ; Tseng, H. ; Reid, K. ; Taylor, B. ; Dip, L. ; Hebert, L. ; Garcia, R. ; Hegde, R. ; Grant, J. ; Gilmer, D. ; Franke, A. ; Dhandapani, V. ; Azrak, M. ; Prabhu, L. ; Rai, R. ; Bagchi, S. ; Conner, J. ; Backer, S. ; Dumbuya, F. ; Nguyen, B. ; Tob
Author_Institution :
Digital DNA Labs., Motorola Inc., Austin, TX, USA
fYear :
2001
fDate :
2-5 Dec. 2001
Abstract :
We report here for the first time the formation of an amorphous oxide layer between the polysilicon gate and hafnium oxide (HfO/sub 2/) gate dielectric due to a lateral oxidation mechanism at the gate edge. Using a polySi reoxidation-free CMOS process, well behaved 80 nm MOSFETs were fabricated with no evidence of lateral oxidation. A CETinv of 25 /spl Aring/ with a leakage current 1000/spl times/ lower than SiO/sub 2/ was obtained for a 30 /spl Aring/ HfO/sub 2//12 /spl Aring/ interfacial oxide stack. In this paper, we present results on the physical and electrical characterization.
Keywords :
CMOS integrated circuits; MOSFET; dielectric thin films; hafnium compounds; leakage currents; oxidation; semiconductor device reliability; silicon; 12 A; 30 A; 80 nm; 80 nm poly-Si gate CMOS; CMOS process technology; HfO/sub 2/ gate dielectric; HfO/sub 2//interfacial oxide stack; MOSFETs; Si-SiO/sub 2/-HfO/sub 2/; amorphous oxide layer formation; electrical characterization; gate edge lateral oxidation mechanism; leakage current; physical characterization; polysilicon gate; reliability results; reoxidation-free CMOS process; Amorphous materials; CMOS process; DNA; Dielectric materials; Dielectric substrates; Hafnium oxide; Laboratories; Leakage current; Oxidation; Silicon compounds;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Conference_Location :
Washington, DC, USA
Print_ISBN :
0-7803-7050-3
Type :
conf
DOI :
10.1109/IEDM.2001.979592
Filename :
979592
Link To Document :
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