Title :
Improvement of power supply rejection ratio of LDO deteriorated by reducing power consumption
Author :
Heng, Socheat ; Pham, Cong-Kha
Author_Institution :
Dept. of Electron. Eng., Univ. of Electro-Commun., Chofu
Abstract :
In this work, the bulk-gate controlled circuit to improve the power supply ripple ratio (PSRR) of a Low Dropout Regulator (LDO) which deteriorates due to lowering power consumption is proposed. Designing with 0.25 mum CMOS process, the simulation results by HSPICE shown that the proposed circuit provides a high performance of PSRR even though 1/10 of the power consumption is reduced compare to the conventional circuit. It is confirmed that about 40[dB] at 10[Hz] frequency and 20[dB] at 1[kHz] frequency of PSRR are together improved.
Keywords :
CMOS integrated circuits; SPICE; low-power electronics; power supply circuits; HSPICE; bulk-gate controlled circuit; low dropout regulator; power supply rejection ratio; power supply ripple ratio; size 0.25 micron; Circuit noise; Energy consumption; Equations; Frequency; MOSFETs; Mobile communication; Noise reduction; Power supplies; Regulators; Threshold voltage;
Conference_Titel :
Integrated Circuit Design and Technology and Tutorial, 2008. ICICDT 2008. IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4244-1810-7
Electronic_ISBN :
978-1-4244-1811-4
DOI :
10.1109/ICICDT.2008.4567242
