Title :
A 2.4 V, 700 μW, 0.18 mm2 second-order demodulator for high-resolution ΣΔ DACs
Author :
Shi, Zhongming ; Hsu, Ken ; Salminen, Olli ; Wang, Mike ; Vahe, Jari ; Kaltiokallio, Kim
Author_Institution :
R&D Centre, Nokia Mobile Phones, San Diego, CA, USA
Abstract :
This work presents the design and measurement results of a novel second-order demodulator for high-resolution sigma-delta digital to analog converters. The demodulator combines digital to analog converting and second-order lowpass filtering into a single step, therefore, eliminating conventionally required post analog filter. This approach offers a large reduction both in chip size and power consumption. A 14-bit fully differential second-order demodulator has been designed and implemented in a complete 2.4 V cellular baseband chip by using a double-poly and triple-metal 0.5 μm low-power CMOS process. The total active chip area and power consumption of the demodulator are 0.18 mm 2 and 700 μW, respectively
Keywords :
CMOS integrated circuits; cellular radio; demodulators; sigma-delta modulation; switched capacitor networks; 0.5 micron; 14 bit; 2.4 V; 700 muW; cellular baseband chip; double-poly triple-metal process; high-resolution ΣΔ DAC; low-power CMOS process; second-order demodulator; second-order lowpass filtering; sigma-delta DAC; sigma-delta digital to analog converters; Capacitors; Clocks; Demodulation; Digital modulation; Digital-analog conversion; Energy consumption; Filters; Performance gain; Power generation; Switches;
Conference_Titel :
Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997
Conference_Location :
Santa Clara, CA
Print_ISBN :
0-7803-3669-0
DOI :
10.1109/CICC.1997.606633
