SOI chip design and charging damage

In this paper we discuss some aspects of antennas in real designs in SOI technology, and show how the concepts manifest themselves in actual chips, where second-order effects such as resistance and the details of the processing sequence can play an important role. We also discuss the ramifications of a more recent technique which inserts bulk contacts into the SOI design, thereby imposing a bulk-like character to the antenna rules, while maintaining the performance advantages of SOI.