DocumentCode
2169120
Title
Investigations of stress sensitivity of 0.12 CMOS technology using process modeling
Author
Senez, V. ; Hoffmann, T. ; Robilliart, E. ; Bouche, G. ; Jaouen, H. ; Lunenborg, M. ; Carnevale, G.
Author_Institution
IEMN-ISEN, CNRS, Villeneuve d´Ascq, France
fYear
2001
fDate
2-5 Dec. 2001
Abstract
This paper presents a mechanical analysis of the entire process flow (i.e.: Front (FEOL) and Back (BEOL) End of Line) of a 0.12 CMOS technology using 2D numerical modeling. This study gives several quantitative modifications concerning the process conditions and device geometries in order to reduce the residual mechanical stress in the devices.
Keywords
CMOS integrated circuits; calibration; elemental semiconductors; integrated circuit modelling; silicon; stress analysis; 0.12 micron; 2D numerical modeling; CMOS technology; IMPACT; SACOX; Si-SiO/sub 2/; back end of line; front end of line; mechanical analysis; CMOS process; CMOS technology; Geometry; Integrated circuit modeling; Mechanical factors; Numerical models; Residual stresses; Rheology; Semiconductor device modeling; Strain measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Conference_Location
Washington, DC, USA
Print_ISBN
0-7803-7050-3
Type
conf
DOI
10.1109/IEDM.2001.979642
Filename
979642
Link To Document