• DocumentCode
    2169385
  • Title

    Approaching the Information Theoretical Bound of Multi-Level NAND Flash Memory Storage Efficiency

  • Author

    Li, Shu ; Zhang, Tong

  • Author_Institution
    ECSE Dept., Rensselaer Polytech. Inst., Troy, NY
  • fYear
    2009
  • fDate
    10-14 May 2009
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    This paper applies information theory to formulate and estimate the NAND flash memory storage efficiency bound, and shows a big gap between the theoretical bound and what is achievable today. We further present two techniques to reduce the gap and demonstrate their promising potential using 2 bits/cell NAND flash memories as a test vehicle.
  • Keywords
    NAND circuits; flash memories; multivalued logic circuits; information theory; multilevel NAND flash memory storage efficiency; storage efficiency bound; Bit error rate; Channel capacity; Communication channels; Entropy; Error correction codes; Fault tolerance; Information theory; Interference; Testing; Vehicles;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Memory Workshop, 2009. IMW '09. IEEE International
  • Conference_Location
    Monterey, CA
  • Print_ISBN
    978-1-4244-3762-7
  • Type

    conf

  • DOI
    10.1109/IMW.2009.5090580
  • Filename
    5090580
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2169385