DocumentCode :
2169522
Title :
HYPERA: High-Yield Performance-Efficient Redundancy Analysis
Author :
Huang, Tsung-Chu ; Lu, Kuei-Yeh ; Huang, Yen-Chieh
Author_Institution :
Dept. of Electron. Eng., Nat. Changhua Univ. of Educ., Changhua, Taiwan
fYear :
2010
fDate :
1-4 Dec. 2010
Firstpage :
231
Lastpage :
236
Abstract :
A novel memory repair architecture based on redundant hypercube is proposed, which mainly consists of a modified ternary CAM with an address bubble-shifter. Generally for an acceptable repair rate about 3% of spare sub cubes and no more than 5% of hardware overhead are required. A modified Quine-McCluskey algorithm and the Essential Cube Pivoting algorithm are also developed for redundancy analysis. Almost 100% of repair rate can be obtained using only 32 equivalent rows under reasonable situations. Under less spare memory the repair rates of proposed approaches can be much higher than most results of previous work.
Keywords :
built-in self test; embedded systems; fault diagnosis; hypercube networks; redundancy; Essential Cube Pivoting algorithm; HYPERA; Quine-McCluskey algorithm; high-yield performance-efficient redundancy analysis; Algorithm design and analysis; Arrays; Circuit faults; Correlation; Maintenance engineering; Redundancy; cluster faults; fault tollerant; hypercube; memory repairing; redundancy analysis; remap-ping architecture;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium (ATS), 2010 19th IEEE Asian
Conference_Location :
Shanghai
ISSN :
1081-7735
Print_ISBN :
978-1-4244-8841-4
Type :
conf
DOI :
10.1109/ATS.2010.48
Filename :
5692252
Link To Document :
بازگشت