Title :
Ultra-high bandwidth memory with 3D-stacked emerging memory cells
Author :
Abe, Keiko ; Tendulkar, Mihir P. ; Jameson, John R. ; Griffin, Peter B. ; Nomura, Kumiko ; Fujita, Shinobu ; Nishi, Yoshio
Author_Institution :
Adv. LSI Technol. Lab., Toshiba Corp., Kawasaki
Abstract :
To increase memory bandwidth with minimum area overhead, the new concept of 3D-stacked memory structure consisting of a small sense amplifier shared with a few 3D memory cells has been presented. The 16 bit 3D-stacked TiO2 memory chip was fabricated and demonstrated. The estimated bandwidth per unit area of 3D-stacked memory in sub-65 nm CMOS technology indicates that the 3D-stacked memory has potential to achieve ultra-high bandwidth required for the future processors.
Keywords :
CMOS integrated circuits; amplifiers; semiconductor storage; titanium compounds; 3D stacked memory cells; CMOS technology; TiO2; TiO2 memory chip; sense amplifier; ultra-high bandwidth memory; Bandwidth; CMOS process; CMOS technology; Decoding; Driver circuits; Frequency; Large scale integration; Switches; Through-silicon vias; USA Councils; 3D-stacked memory; Bandwidth; Integration of emerging memory and CMOS; TiO2;
Conference_Titel :
Integrated Circuit Design and Technology and Tutorial, 2008. ICICDT 2008. IEEE International Conference on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4244-1810-7
Electronic_ISBN :
978-1-4244-1811-4
DOI :
10.1109/ICICDT.2008.4567279
