DocumentCode
2169776
Title
Probabilistic modeling of nanoscale adder
Author
Lu, Xiaojun ; Li, Jianping ; Yang, Guo Wu ; Song, Xiaoyu
Author_Institution
Sch. of Comput. Sci., Univ. of Electron. Sci. & Technol., Chengdu
fYear
2008
fDate
2-4 June 2008
Firstpage
219
Lastpage
222
Abstract
This paper presents the probabilistic logic model to compute the probability distribution of the nano gate states. The characterization is based on the Markov random field and statistic physics. The primary logic gates are probabilistically characterized. The effectiveness of the method is demonstrated by a full adder and an 8-bit adder. The analysis shows that the device probability distribution highly depends on the system structures and other performance parameters.
Keywords
Markov processes; adders; statistical distributions; Markov random field; nanoscale adder; probabilistic logic model; probability distribution; statistic physics; Adders; Distributed computing; Logic devices; Markov random fields; Nanoelectronics; Physics; Power system modeling; Probabilistic logic; Probability distribution; Statistical distributions; Digital circuit; nanoelectronics; probability; probability logic;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuit Design and Technology and Tutorial, 2008. ICICDT 2008. IEEE International Conference on
Conference_Location
Austin, TX
Print_ISBN
978-1-4244-1810-7
Electronic_ISBN
978-1-4244-1811-4
Type
conf
DOI
10.1109/ICICDT.2008.4567282
Filename
4567282
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