A Noise-Aware Hybrid Method for SDD Pattern Grading and Selection

Testing for small-delay defects (SDDs) is necessary for ensuring product quality in smaller technology nodes. Current tools such as transition-delay fault (TDF) ATPGs and timing-aware ATPGs are either inefficient in detecting SDDs or suffering from large pattern count and CPU runtime. Furthermore, none of these methodologies take into account the impact of pattern-induced noises, e.g., power supply noise (PSN) and cross talk, which are potential sources of SDDs. In this paper, we present a hybrid method considering the impacts of pattern-induced noises to grade and select the most effective patterns for detecting SDDs. The grading procedure is performed on a large repository of patterns generated by ¿-detect TDF ATPG. Top-off ATPG is performed after pattern selection to achieve the same fault coverage as that for timing-aware ATPG. The experimental results demonstrate the efficiency of our proposed method, it results in a pattern count close to 1-detect ATPG while sensitizes similar or greater number of long paths than the commercial timing-aware ATPG pattern set.